The group of companies "T-Platforms’, a leading provider of systems, software, services and solutions for high-performance computing, won the public tender for the supply and commissioning of equipment for the second phase expansion of the supercomputer" Lomonosov "in the Moscow State University. University. A contract worth 770 million rubles. called for increased overall performance supercomputer to 1.3 petaflops (quadrillion operations per second).
At the moment, the "T-Platforms" completes the delivery and setup of optional equipment of the first stage supercomputer "Lomonosov", which will allow the installation to the end of December to reach a peak performance of 510 teraflops. The second phase of the supercomputer peak performance of 800 teraflops at double-precision operations will be based on the newest hybrid blade system "T-Platforms» TB2-TL ™ c GPUs NVIDIA Tesla ™ X2070. Due to the unique computational density of a new platform for the expansion of the "University" will require a total of 8 standard cabinets with computer equipment, each of which will provide peak performance 100Tflops for double-precision operations. The new solution has allowed MSU to reduce the unit cost of computing power to a record 31 million dollars for 1 teraflops.
Under the contract, delivery of most of the equipment will be completed before the end of the year, and the start-up of the complex will be completed at the end of the second quarter of 2011. The package will also include an additional 100 TB of highly reliable storage of user data, and the volume of the archive system will grow to 1 PB. The project involves the expansion of the network infrastructure of the system, while increasing power and cooling infrastructure is needed: the physical infrastructure, set in the first phase of construction of a supercomputer "Lomonosov", was originally designed to expand the system to 1 Pflops. Currently working in the first place, "Lomonosov" processor-based Intel ® Xeon ® will be combined with the new hybrid system based on graphics processors using c interconnect that allows the two systems to function as a unit.